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Invited Talks

Invited Talk – Ultra-Reliable All-Liquid Interconnections for Power Electronics Components

Francesco Iannuzzo – Polytechnic of Turin, Italy

Power semiconductors are vulnerable to thermo-mechanical stress due to the use of solid-metal interconnect technologies such as wire bonding, soldering, and sintering. This presentation showcases a successful usage of room-temperature Gallium-based liquid-metal pastes for chip-level packaging of SiC MOSFETs. All chip-critical interconnects (die-attach, topside, and gate connections) are implemented using liquid-metal, which remains liquid during operation. We tested the SiC MOSFETs for thermal and reliability performance. Liquid-metal packaged SiC MOSFETs showed improved thermal performance and an order of magnitude increase in power cycling lifetime. Notably, the liquid-metal pastes are contained without the use of any encapsulation.

Francesco Iannuzzo is a professor of reliable power electronics with the Power Electronics Innovation Center (PEIC) at Politecnico di Torino, Italy. His research focuses on the reliability of wide-bandgap power devices (SiC MOSFETs, GaN HEMTs), their modeling and characterization, condition monitoring, simulation, and new driving concepts to improve reliability.

Prof. Iannuzzo is the author or co-author of over 350 publications in journals and international conferences, five book chapters, and an edited book on Modern Power Electronic Devices. He has delivered over 50 technical seminars, keynotes, and several invited speeches on power electronic device reliability at top-tier conferences, including ISPSD, IRPS, EPE, ECCE, PCIM, and APEC.

Furthermore, he is a Fellow of the U.S. Institute of Electrical and Electronics Engineers (IEEE). He has served as General Chair of ESREF 2018, IWIPP 2022 (International Workshop on Integrated Power Packaging), and EPE-ECCE Europe 2023.

Invited Talk – Cryogenic low-noise amplifiers for quantum computing: Engineering noise and thermal properties

Cezar Zota – IBM Research Europe, Switzerland

Cryogenic low-noise amplifiers are essential parts of today’s quantum computers, and are primarily employed in the readout path at the 4 K stage to read the qubit states. Their performance and reliability directly impact the quantum computations, e.g. through the readout fidelity. As one of few active, i.e. power-dissipating, cryogenic devices used already today, there are strict requirements placed in terms of noise-levels, power, stability and robustness. To support ever increasing qubit numbers, improved amplifiers will be desirable in the future. In this presentation, we demonstrate our cryogenic III-V high-electron mobility transistor technology based on the InGaAs/InP system. We show how noise properties depend on temperature, and how this dependence arises from various traps and defects across the heterostructure that can be effectively suppressed with quantum well engineering. We also describe thermal effects, in particular self-heating, which is one of the primary limits of noise and reliability in these devices. Several self-heating measurement methodologies are examined, such as quantum thermometry, which is able to determine both the intrinsic electron temperature, as well as associated scattering mechanisms throughout the device self-heating process. Power semiconductors are vulnerable to thermo-mechanical stress due to the use of solid-metal interconnect technologies such as wire bonding, soldering, and sintering. This presentation showcases a successful usage of room-temperature Gallium-based liquid-metal pastes for chip-level packaging of SiC MOSFETs. All chip-critical interconnects (die-attach, topside, and gate connections) are implemented using liquid-metal, which remains liquid during operation. We tested the SiC MOSFETs for thermal and reliability performance. Liquid-metal packaged SiC MOSFETs showed improved thermal performance and an order of magnitude increase in power cycling lifetime. Notably, the liquid-metal pastes are contained without the use of any encapsulation.

Dr. Zota received the PhD degree in Electrical Engineering from Lund University, Sweden, in 2017. Since then, he has been Staff Research Scientist and Master Inventor at IBM Research Europe – Zurich. His research interests include cryogenic electronics for quantum computing, including III-V amplifiers, cryo-CMOS and cryogenic modelling. More recently, his work has also focused on state-of-the-art CMOS technologies, in particular for the back-end-of-line. He is the recipient of an Ambizione career grant from the Swiss National Science Foundation, is a member of the National Centre of Competence in Research SPIN, has coordinated several European research projects, and holds over 20 patents and has co-authored over 80 peer-reviewed publications in the field of electron devices.